so I’m using the 101 to sequence among other things the Bitbox, and I’m running into the problem created by the 3ms lag of the CV relative to the start of trigger/gate. slice selection is erratic.
I’ve been scanning forums and shops for the best module for delaying gates and triggers (not converting gates to triggers, like the doepfer A-162 does) but nothing really suitable has yet surfaced on my side (aside from the animodule gate_mod, but from the documentation I’m unsure it is suitable and ordering from US is less than optimal…). one might think a 4hp panel could house 2 delays if the purpose were just that.
tying up an ADSR at the moment for this, anyone with some other ideas for delaying a trigger/gate while retaining the length of said signal?