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V0.3.x Firmware Workout: Better late than never



Hi Brian!

if the Unipolar VCA range is 0+, regardless if there’s bipolar signal before it, should the level range still be bipolar? Would it be more consistent to have 0 to +5 as the level range?


Questions about the clocked Stretch unit…

Should the Clock Circle GUI reflect the The Multiply and divide settings?

Also wondering if there should be an internal limit (or preference?) to how fast it can clock . I was messing around with clock settings and inadvertently brought the 301 to it’s knees with absolute slo-mo and had to just kill the power a few times (totally my fault though!!)


I got an issue with reloading a Chain - “LUA - not a valid extension”

I saved this with the usual steps, seemed to have made the extension all capitals (I didn’t do this).


weirdly on the card on the computer it’s not in capitals



Is there any change if you boot up and try out a delay unit with no SD card in the front slot?


This is what I’ve been doing also.

Aren’t you secretly wanting to juggle between two sync’ed loops?


Keep in mind that you are not actually adjusting the level with that fader. You are adjusting the bias (or offset) on the incoming modulation that ultimately controls the (gain) level of the VCA. So in that light there are cases where you might want to bias a really hot signal down, perhaps clipping off the bottom portion of an LFO or envelope for example.

The above doesn’t always apply though. In my opinion, this just happens to be unusually true for the case of a utility unit like the VCA.

And if you are having a hard time getting to exactly to zero, then don’t forget the ZERO function (SHIFT+HOME).


It intentionally does not. I’ll have a think about this. It’s definitely possible but just so you understand it would need to use additional CPU resources to actually render the derived clock based on the chosen ratio of the measured period of the incoming clock. I suppose its not much CPU but I want to make the point that the derived clock signal is not already computed and just waiting to be shown. This display clock would also need a sync signal because clock multipliers and clock dividers require external sync, but I guess I could just take the sync signal from the unit’s trigger parameter.


Not your fault. It sounds like you’ve encountered the same issue as @sixnon. There is definitely something unintended happening. An investigation is in progress :wink:


I’ve found that it cramps up most if the clock is “accidentally” too fast and switching slices if that’s of any help


still -36dB


@odevices Thank you so much, this is a fantastic update. Really find the new clocked players amazing. Just wondering if there is anyway to modulate the divide and multiply?
I have had some pretty cool results just manually doing it so it would be unreal to have them under cv control.


just insert a tap tempo after your clock input and modulate his div\mult with whatever. or am i missing something?


BTW is this repeatable?


When you get a chance, please zip up the contents of your rear SD card and send it to me please.


What @hyena said is correct :wink:


voilà: SDREAR_ER301_bkilchhofer.zip (2.9 MB)


Hey !
In 0.3.20 firmware when I bypass a mixer channel that atenuate the sound of all other mixer channel for maybe 500ms…
Before this fimware when you bypass a mixer channel that do nothing…


ok, definitely looking forward to Joe or Neil vids on these new players. amazing.


That would be due to the following enhancement to prevent clicks and pops during certain operations:

I suppose I can customize the behavior for when you are muting mixer units so the parent chain is not affected since it is not really necessary in this case.